esp_sdr_diag_cfg Struct Reference

Data Fields
const int8_t *	pins
uint8_t	lsb
uint8_t	clk_div
bool	falling_edge
uint32_t	seconds
esp_sdr_diag_sink_t	sink
uint8_t	decim
esp_sdr_diag_iq_sink_t	iq_sink

Field Documentation

clk_div

uint8_t esp_sdr_diag_cfg::clk_div

PARLIO divider of 240 MHz (6 = 40 MS/s, 0 = 6), 2 to 255; also divides the sample rate.

decim

uint8_t esp_sdr_diag_cfg::decim

Decimate in the library: a boxcar of 16 and a third-order CIC by this factor, ESP_SDR_DIAG_DECIM_MIN to MAX, or 0 for none. The output rate is byte_rate / 16 / decim (40 MS/s: 2.5 MS/s / decim).

falling_edge

bool esp_sdr_diag_cfg::falling_edge

Sample on the falling PARLIO clock edge instead of the rising one.

iq_sink

esp_sdr_diag_iq_sink_t esp_sdr_diag_cfg::iq_sink

Called with the decimated samples; may be NULL.

lsb

uint8_t esp_sdr_diag_cfg::lsb

Nibble window start 0 to ESP_SDR_DIAG_LSB_MAX, or ESP_SDR_DIAG_LSB_AUTO.

pins

const int8_t* esp_sdr_diag_cfg::pins

Eight GPIO numbers, or NULL for the defaults {0, 1, 3, 4, 5, 7, 10, 23}.

seconds

uint32_t esp_sdr_diag_cfg::seconds

Run time in seconds, 0 to run until esp_sdr_diag_stop().

sink

esp_sdr_diag_sink_t esp_sdr_diag_cfg::sink

Called from the thread that called esp_sdr_diag_run(); may be NULL.

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The documentation for this struct was generated from the following file:

• esp_sdr/esp_sdr_diag.h